| CVE-2023-34326 | Date: (C)2023-11-29 (M)2024-04-26 |
The caching invalidation guidelines from the AMD-Vi specification (48882���Rev
3.07-PUB���Oct 2022) is incorrect on some hardware, as devices will malfunction
(see stale DMA mappings) if some fields of the DTE are updated but the IOMMU
TLB is not flushed.
Such stale DMA mappings can point to memory ranges not owned by the guest, thus
allowing access to unindented memory regions.
CVSS Score and Metrics +CVSS Score and Metrics -| CVSS V3 Severity: | CVSS V2 Severity: |
| CVSS Score : 7.8 | CVSS Score : |
| Exploit Score: 1.8 | Exploit Score: |
| Impact Score: 5.9 | Impact Score: |
| |
| CVSS V3 Metrics: | CVSS V2 Metrics: |
| Attack Vector: LOCAL | Access Vector: |
| Attack Complexity: LOW | Access Complexity: |
| Privileges Required: LOW | Authentication: |
| User Interaction: NONE | Confidentiality: |
| Scope: UNCHANGED | Integrity: |
| Confidentiality: HIGH | Availability: |
| Integrity: HIGH | |
| Availability: HIGH | |
| | |
